关于CMSIS

嵌入式 arm

什么是CMSIS
Arm官方库

什么是CMSIS

一直看到CMSIS这个单词，但是不知道是什么？直接百度百科了一下，如下：

ARM Cortex™ 微控制器软件接口标准(CMSIS：Cortex Microcontroller Software Interface Standard) 是 Cortex-M 处理器系列的与供应商无关的硬件抽象层（英文原文为：a vendor-independent hardware abstraction layer for the Cortex-M processor series and defines generic tool interfaces—来自ARM官方定义）。使用CMSIS，可以为处理器和外设实现一致且简单的软件接口，从而简化软件的重用、缩短微控制器新开发人员的学习过程，并缩短新设备的上市时间。软件的创建被嵌入式行业公认为主要成本系数。通过在所有Cortex-M 芯片供应商产品中标准化软件接口，这一成本会明显降低，尤其是在创建新项目或将现有软件迁移到新设备时。最新版本的CMSIS为5.5.1

看来就是ARM官方定义的关于内核（主要是Cortex-M内核）和芯片厂商外设的硬件抽象层，从而实现软件复用，便于移植，便于开发，降低了时间成本

Arm官方库

这是ARM的官方仓库，里面资料丰富，可以查收一下，还有DSP库和NN神经网络算法库

库名	平台	描述
Driver	All Cortex-M, SecurCore	Generic peripheral driver interfaces for middleware. Connects microcontroller peripherals with middleware that implements for example communication stacks, file systems, or graphic user interfaces.
DSP	All Cortex-M	DSP library collection with over 60 Functions for various data types: fixed-point (fractional q7, q15, q31) and single precision floating-point (32-bit). Implementations optimized for the SIMD instruction set are available for Cortex-M4/M7/M33/M35P.
NN	All Cortex-M	Collection of efficient neural network kernels developed to maximize the performance and minimize the memory footprint on Cortex-M processor cores.
RTOSv1	Cortex-M0/M0+/M3/M4/M7	Common API for real-time operating systems along with a reference implementation based on RTX. It enables software components that can work across multiple RTOS systems.
RTOSv2	All Cortex-M, Cortex-A5/A7/A9	Extends CMSIS-RTOS v1 with Armv8-M support, dynamic object creation, provisions for multi-core systems, binary compatible interface.
Pack	All Cortex-M, SecurCore, Cortex-A5/A7/A9	Describes a delivery mechanism for software components, device parameters, and evaluation board support. It simplifies software re-use and product life-cycle management (PLM).
SVD	All Cortex-M, SecurCore	Peripheral description of a device that can be used to create peripheral awareness in debuggers or CMSIS-Core header files.
DAP	All Cortex	Firmware for a debug unit that interfaces to the CoreSight Debug Access Port.

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